Veritable Inc. is announcing version 2.0 of its innovative Design Verity-Check formal property checker at DAC. Major improvements in Design Verity-Check include:
formal clock domain boundary checking, support for specification of temporal design properties using the Verilog HDL, automatic FSM analysis, RTL DFT checking and support for user specified rules. With version
2.0, Design Verity is now also available on HP UX11 and Linux platforms.Formal clock domain boundary checking ensures that data that crosses clock domain boundaries is synchronized. Verity-Check
recognizes the use of the most common synchronization schemes and allows the user to specify custom synchronizers. Verity-Check also flags data that is generated by one edge of a clock and consumed by the opposite
edge and checks for the appropriate use of lock-up latches.
Support for user specified properties expressed using the Verilog HDL allows designers to embed properties/assertions in their Verilog design
descriptions. Thus, designers can now specify properties without learning a new language and can use the same assertion code for both simulation and formal property checking.
Verity-Check 2.0 performs state-space
search based FSM analysis. It automatically extracts state machines from your RTL and checks for state transitions, identifying unreachable and dead-end states.
DFT checking at the register transfer level allow
you to identify testability issues early. Verity-Check 2.0 locates issues in your RTL that will cause downstream testability problems, before you synthesize to gates. Verity-Check allows you to specify test
procedures so that test controller operation can be verified and DFT checks can be performed while test controllers are in required states.
Verity-Check's support for user re-configurable rules and rule packages
allows design teams to customize and create rules and rule packages that address their design checking requirements. Predefined packages simplify the enforcement of design methodologies such as design for
re-usability, design for testability and design for verifiability.
Availability
Release 2.0 of Design Verity-Check is available now on Solaris, Windows 2000/NT, Linux and HP UX11. Subscription
licenses start from $5,000.
About Veritable
Veritable Inc. is a privately held Electronic Design Automation company that provides innovative formal validation solutions and services. Veritable has
headquarters in Mountain View, California.
For further information, visit the Veritable web-site at
